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Verilog preprocessor: `include via macro expansion Pull request checks #8607: Pull request #2330 synchronize by kroening
9m 5s kroening/include-via-define
kroening/include-via-define
9m 5s
Verilog preprocessor: `include via macro expansion Syntactic checks #6073: Pull request #2330 synchronize by kroening
3m 49s kroening/include-via-define
kroening/include-via-define
3m 49s
Verilog preprocessor: `include via macro expansion Syntactic checks #6072: Pull request #2330 opened by kroening
1m 36s kroening/include-via-define
kroening/include-via-define
1m 36s
Verilog preprocessor: `include via macro expansion Pull request checks #8606: Pull request #2330 opened by kroening
13m 59s kroening/include-via-define
kroening/include-via-define
13m 59s
Verilog: interface ports take the parameters of the bound instance Pull request checks #8605: Pull request #2186 synchronize by kroening
26m 55s interface-fixes/parameters
interface-fixes/parameters
26m 55s
Verilog: interface ports take the parameters of the bound instance Syntactic checks #6071: Pull request #2186 synchronize by kroening
15m 28s interface-fixes/parameters
interface-fixes/parameters
15m 28s
Verilog: interface port members are aliases of the bound instance's members Pull request checks #8604: Pull request #2190 synchronize by kroening
33m 7s interface-fixes/alias
interface-fixes/alias
33m 7s
Verilog: interface port members are aliases of the bound instance's members Syntactic checks #6070: Pull request #2190 synchronize by kroening
1m 55s interface-fixes/alias
interface-fixes/alias
1m 55s
Verilog: RTL construction with system functions of type integer Pull request checks #8603: Pull request #2300 synchronize by kroening
30m 20s bugfixes/rtl-system-functions
bugfixes/rtl-system-functions
30m 20s
Verilog: RTL construction with system functions of type integer Syntactic checks #6069: Pull request #2300 synchronize by kroening
1m 20s bugfixes/rtl-system-functions
bugfixes/rtl-system-functions
1m 20s
Verilog: type of dynamic arrays Pull request checks #8602: Pull request #2301 synchronize by kroening
45m 16s bugfixes/dynamic-array-declaration
bugfixes/dynamic-array-declaration
45m 16s
Verilog: type of dynamic arrays Syntactic checks #6068: Pull request #2301 synchronize by kroening
1m 28s bugfixes/dynamic-array-declaration
bugfixes/dynamic-array-declaration
1m 28s
Verilog: hierarchical references into named generate blocks Syntactic checks #6067: Pull request #2101 synchronize by kroening
1m 47s kroening/fix-generate-block-hierarchical-ref
kroening/fix-generate-block-hierarchical-ref
1m 47s
Verilog: hierarchical references into named generate blocks Pull request checks #8601: Pull request #2101 synchronize by kroening
17m 39s kroening/fix-generate-block-hierarchical-ref
kroening/fix-generate-block-hierarchical-ref
17m 39s
Verilog: hierarchical references into named generate blocks Syntactic checks #6066: Pull request #2101 synchronize by kroening
3m 49s kroening/fix-generate-block-hierarchical-ref
kroening/fix-generate-block-hierarchical-ref
3m 49s
Verilog: hierarchical references into named generate blocks Pull request checks #8600: Pull request #2101 synchronize by kroening
10m 1s kroening/fix-generate-block-hierarchical-ref
kroening/fix-generate-block-hierarchical-ref
10m 1s
New IC3: decision-variable restriction and eager clause pushing Pull request checks #8599: Pull request #1993 synchronize by kroening
10m 24s kroening/new-ic3-performance
kroening/new-ic3-performance
10m 24s
New IC3: decision-variable restriction and eager clause pushing Syntactic checks #6065: Pull request #1993 synchronize by kroening
11m 47s kroening/new-ic3-performance
kroening/new-ic3-performance
11m 47s
KNOWNBUG test for a port connected to an interface in a generate block Pull request checks #8598: Commit 73ce9d6 pushed by kroening
9m 5s main
main
9m 5s
KNOWNBUG test for a port connected to an interface in a generate block github-io-webpages #231: Commit 73ce9d6 pushed by kroening
26m 2s main
main
26m 2s
Verilog: constrain assigned slices of arrays in the initial state github-io-webpages #230: Commit b0c9a7e pushed by kroening
13m 13s main
main
13m 13s
Verilog: constrain assigned slices of arrays in the initial state Pull request checks #8597: Commit b0c9a7e pushed by kroening
8m 14s main
main
8m 14s
KNOWNBUG test for a port connected to an interface in a generate block Pull request checks #8596: Pull request #2325 synchronize by tautschnig
8m 36s kiro/knownbug-generate-interface-port
kiro/knownbug-generate-interface-port
8m 36s
KNOWNBUG test for a port connected to an interface in a generate block Syntactic checks #6064: Pull request #2325 synchronize by tautschnig
1m 48s kiro/knownbug-generate-interface-port
kiro/knownbug-generate-interface-port
1m 48s
Verilog: constrain assigned slices of arrays in the initial state Pull request checks #8595: Pull request #2321 synchronize by tautschnig
9m 19s bugfixes/initial-slices-main
bugfixes/initial-slices-main
9m 19s